IC Layout Design and Verification online (San Jose, CA)

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IC Layout Design and Verification online

The most comprehensive IC Layout training programs in the industry this program explores semiconductor process technologies from 0.18um BCD down to 23nm -14nm and covers Custom Analog Digital and Mixed-Signal layout skills. Class assignments and practice examples are realistic and are taken from actual design projects. New program starts Jan 26 2016. This program is offering on WebEx. For more info please contact Silicon Valley Polytechnic Institute info(at)svpti.com or call 408-436-3000.

07-03-2025 UNITED STATES, San Jose, CA
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